Our research centers around the systematic design (CAD) of hardware/software systems, ranging from embedded systems to HPC platforms. One principal research direction is domain-specific computing that tries to tackle the very complex programming and design challenge of parallel heterogeneous computer architectures. Domain-specific computing drastically separates the concerns of algorithm development and target architecture implementation, including parallelization and low-level implementation details. The key idea is to take advantage of the knowledge being inherent in a particular problem area or field of application, i.e., a particular domain, in a well-directed manner and thus, to master the complexity of heterogeneous systems. Such domain knowledge can be captured by reasonable abstractions, augmentations, and notations, e.g., libraries, Domain-specific programming languages (DSLs), or combinations of both (e.g., embedded DSLs implemented via template metaprogramming). On this basis, patterns can be utilized to transform and optimize the input description in a goal-oriented way during compilation, and, finally, to generate code for a specific target architecture. Thus, DSLs provide high productivity plus typically also high performance. We develop DSLs and target platform languages to capture both domain and architecture knowledge, which is utilized during the different phases of compilation, parallelization, mapping, as well as code generation for a wide variety of architectures, e.g., multi-core processors, GPUs, MPSoCs, FPGAs. All these steps usually go along with optimizing and exploring the vast space of design options and trading off multiple objectives, such as performance, cost, energy, or reliability.
Research projects
Diffusion-weighted imaging and quantitative susceptibility mapping of the breast, liver, prostate, and brain
Development of new MRI pulse sequences
Development of new MRI post-processing schemes
Joint evaluation of new MR methods with radiology
Domain-specific Computing for Medical imaging
Hipacc — the Heterogeneous Image Processing Acceleration Framework
AI Laboratory for System-level Design of ML-based Signal Processing Applications
Architecture Modeling and Exploration of Algorithms for Medical Image Processing
ACoF -- Approximate Computing on FPGAs
(Third Party Funds Single)
Term: since 1. June 2021 Funding source: DFG-Einzelförderung / Sachbeihilfe (EIN-SBH)
Approximate Computing systematically exploits the trade-off between accuracy, power/energy consumption, performance, and cost of many applications of daily life, e.g., computer vision, machine learning, multimedia, big data analysis and gaming. Computing results approximately is a viable approach here thanks to inherent human perceptual limitations, redundancy, or noise in input data.In this project, we want to investigate novel techniques for the design and optimization of approximate logic circuits for FPGA (field-programmable gate array) targets. These devices are known to perfectly combine high performance of hardware designs with the re-programmability of software and are used in many products of daily life and even cloud servers. The goal of our research is a) to investigate novel techniques for function approximation exploiting FPGA artifacts, i.e., DPS blocks and BRAM, b) to study new error metrics and a calculus for error propagation in networks of approximate arithmetic modules, c) to develop novel FPGA-specific optimization techniques for design space exploration and synthesis of approximate multi-output Boolean functions, and d) study how to integrate error modeling and analysis techniques into existing high-level programming languages and subsequent synthesis of approximate Verilog or VHDL designs.
This project is funded by the Federal Ministry of Education and Research (BMBF) as part of the AMMOD project. The implementation of the project is overseen by the German Aerospace Center (DLR).
Our planet loses biodiversity year after year. Since 1990, the number of insects and birds in Central Europe has fallen sharply, which has been confirmed by individual studies. However, there is no comprehensive collection and scientific evaluation of such data, as is the case, for example, in climate research. The main reason being that technical prerequisites and infrastructures are lacking.
The AMMOD project combines innovative technologies and adapts them to automatize the detection of species, in analogy to continuous measurements achieved with autonomous weather stations. For this purpose, the following modules are developed:
Automatized sampling of insects, pollen and airborne spores für the identification via DNA barcodes (see GBOL project)
Automatized image recognition for birds (among others with a “sky scanner”), mammals, nocturnal insects (“moth scanner”)
Automatized bioacoustics species identification (e.g. for birds, bats, grasshoppers)
Automatized analysis of biogenic scents (“smellscape analysis”).
For the automated monitoring of the occurrence of different species in extensive, often inaccessible areas, these AMMOD technologies as well as the storage, processing and transmission of their data must be integrated on a generic platform, which serves as a "weather station of biodiversity". This platform must be equipped with various sensors and actuators and configurable with various software and hardware components. The challenge in designing this platform is that, on the one hand, such stations have to process, store, and transmit large amounts of data via mobile radio. On the other hand, the available resources in the field are limited (energy based on solar or wind power for a self-sufficient power supply, data storage capacity and communication bandwidth).
Our subproject deals with sensor data processing and storage within the base station. The subproject has two main objectives. On the one hand, designing a hardware architecture for the AMMOD base station which enables the processing and storage of sensor data energy-efficiently and in real time, but which can be generically adapted for the different application domains. On the other hand, the partners of other subprojects will be supported in the implementation of their algorithms in software and hardware, since the programming of the hardware architectures embedded in AMMOD stations (especially multi-core computers and programmable hardware components) requires expert knowledge. It is a declared goal to provide a design methodology that automatically generates an optimized hardware-software configuration of the platform from an intuitive and graphical description of data processing algorithms, so that experts from other areas are also able to program the platform without the corresponding know-how.
Cyberkriminalität wird angesichts der wachsenden gesellschaftlichen Bedeutung der Informationstechnologie zu einer immer größeren Bedrohung. Gleichzeitig bieten sich neue Möglichkeiten der Strafverfolgung, wie etwa automatisierte Datensammlung und -auswertung im Netz oder Überwachungsprogramme. Doch wie geht man mit den Grundrechten der Betroffenen um, wenn „forensische Informatik“ genutzt wird? Das GRK „Cyberkriminalität und Forensische Informatik“ bringt Expertinnen und Experten der Informatik und Rechtswissenschaften zusammen, um das Forschungsfeld „Strafverfolgung von Cyberkriminalität“ systematisch zu erschließen.
TCPAs provide a platform for the highly time-predictable and ultra-low power implementation of parallel loop nests. Yet, as loop bounds may often be unknown at compile-time, new techniques for (a) self-invasion are required to determine claim sizes and perform (b) self-power adjustment and (c) self-selection of redundancy schemes at run time to enforce throughput, latency, power and reliability requirements. Moreover, to lift TCPAs to new application areas, (d) novel floating point processors with invadable precision (FloaTCPAs) including (e) functional units with programmable latency to compute instructions approximately will be investigated.
The central activities and services of the CRC/Transregio are coordinated and conducted by Project Z. They are subdivided into two parts: 1) Technical, administrative and organisational support (organisation of internal meetings, seminars and the Doctoral Researcher Retreats, assistance for guests and investigators of the CRC travelling abroad), financial administration and bookkeeping. 2) Public Relations: Contact to research sites and industry, as well as to local high schools. Engagement in and organisation of workshops and conferences. Finally, editing and maintenance of the website www.invasic.de.
Albeit the isolation of parallel programs on multicore systems through invasive computing, uncertainties of input, machine state and environment currently prohibit to provide predictable and tight bounds on non-functional properties such as timing and power and to guarantee that requirements on these will never be violated. We will investigate novel concepts and techniques for run-time requirement enforcement (RRE) including (a) centralised vs. distributed, (b) loose vs. strict, (c) proper formal verification techniques for strict enforcers and general pro-gram properties, finally (d) techniques for automatic enforcer generation from requirements.
Invasive computing denotes a novel paradigm for the design and programming of future parallel computing systems. Its unique characteristic is to give a programmer explicit handles to specify and argue about resource requirements desired, or required in different phases of execution: Using an invade command, an application may instruct the operating system to claim a set of processor, memory and communication resources for being allocated for a -by default- subsequent exclusive use. In an infect phase, the application workload is then spread and executed on the obtained claim of resources. A retreat command finally frees a claim again and the application may resume sequential execution. To support this idea of self-adaptive and resource-aware programming, not only novel programming concepts, languages, compilers and operating system concepts had to be developed from scratch, but also revolutionary architectural changes in the design of MPSoCs (multiprocessor system-on-a-chip) including mechanisms to allocate and isolate resources on demand. Mission I: Basic Principles and Invasive Efficiency. As major results of the first funding phase, substantial gains in multicore utilisation and efficiency have been shown to be achievable by only claiming resources when necessary and retreating from them if not needed. Mission II: *-Predictability. A unique jewel of invasive computing is the inherent capability to isolate even distributed applications from each other by not sharing resources. This feature has shown to enable *-predictability of non-functional qualities of program execution such as execution time, throughput, but also safety and security properties. Using current multicore platforms and operating systems, little if no support for hardware and/or temporal isolation can be established on demand of an application program. By exploiting the fact that resources may be (temporally) claimed exclusively, we were able to show that *-predictability may be enabled on program demand using invasive computing which uses run-to-completion as the default mode of thread execution, partial virtualisation and techniques for memory reconfiguration and bandwidth guarantees on the designed invasible NoC. Mission III: Beating Run-Time Uncertainties and Run-Time Requirement Enforcement. Not only the interferences caused when sharing resources such as caches, processors and communication links as being the practice today, makes the analysis of non-functional properties hard. The bounds themselves or their variability might be much too large for any practical use. Unfortunately, isolation alone does not help to reduce the remaining uncertainty caused by input (problem size), environment (e.g. temperature), and machine state (e.g., cache, power manager, etc.). Our goal of phase III is therefore to close this missing link for making multicore systems available to be used for the billion dollar market of embedded and cyber-physical IoT products where application programs require the strict or at least loose enforcement of tight non-functional property ranges. Here, through the static analysis of robustness and the automatic generation of verifiable run-time requirement enforcer (RRE) modules (additional code that either locally or globally observes and controls the satisfaction of requirements within prescribed corridors) in combination with run-time requirement monitoring (RRM), we expect to provide the missing link to successfully combine resource awareness and tight predictability of non-functional aspects of program execution on multicore platforms.
Hahn, T., Becher, A., Wildermann, S., & Teich, J. (2022). Raw Filtering of JSON data on FPGAs. In Proceedings of the Design, Automation and Test in Europe Conference (DATE). Antwerpen, BE.
Alhaddad, S., Förstner, J., Groth, S., Grünewald, D., Grynko, Y., Hannig, F.,... Wende, F. (2021). HighPerMeshes -- A Domain-Specific Language for Numerical Algorithms on Unstructured Grids. In Proceedings of the 18th International Workshop on Algorithms, Models and Tools for Parallel Computing on Heterogeneous Platforms (HeteroPar) in Euro-Par 2020: Parallel Processing Workshops. Warsaw, PL: Springer.
Keszöcze, O., Brand, M., Witterauf, M., Heidorn, C., & Teich, J. (2021). Aarith: An Arbitrary Precision Number Library. In Proceedings of the ACM/SIGAPP Symposium On Applied Computing. virtual conference, KR.
Sabih, M., Hannig, F., & Teich, J. (2021). Fault-Tolerant Low-Precision DNNs using Explainable AI. In 2021 51st Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W). Virtual Workshop: IEEE Xplore.
Streit, F.-J., Krüger, P., Becher, A., Schlumberger, J., Wildermann, S., & Teich, J. (2021). CHOICE – A Tunable PUF-Design for FPGAs. In IEEE Proceedings of the 31th International Conference on Field Programmable Logic and Applications. Dresden, Germany.
Streit, F.-J., Krüger, P., Becher, A., Wildermann, S., & Teich, J. (2021, December). Design and Evaluation of a Tunable PUF Architecture for FPGAs. Paper presentation at International Conference on Field-Programmable Technology (FPT), Auckland, New Zealand, NZ.
Streit, F.-J., Wildermann, S., Pschyklenk, M., & Teich, J. (2021). Providing Tamper-Secure SoC Updates through Reconfigurable Hardware. In Springer Proceedings of the 17th International Symposium on Applied Reconfigurable Computing. Rennes, France, FR: Springer Computer Science Proceedings.
Lengauer, C., Apel, S., Bolten, M., Chiba, S., Rüde, U., Teich, J.,... Schmitt, J. (2020). ExaStencils – Advanced Multigrid Solver Generation. In Hans-Joachim Bungartz, Severin Reiz, Philipp Neumann, Benjamin Uekermann, Wolfgang Nagel (Eds.), Software for Exascale Computing – SPPEXA 2016-2019. (pp. 405-452). Springer.
Lengauer, C., Apel, S., Bolten, M., Chiba, S., Rüde, U., Teich, J.,... Schmitt, J. (2020). ExaStencils: Advanced multigrid solver generation. In Hans-Joachim Bungartz, Severin Reiz, Benjamin Uekermann, Philipp Neumann, Wolfgang E. Nagel (Eds.), Lecture notes in computational science and engineering. (pp. 405-452). Cham: Springer.
Qiao, B., Reiche, O., Özkan, M.A., Teich, J., & Hannig, F. (2020). Efficient Parallel Reduction on GPUs with Hipacc. In Proceedings of the 23rd International Workshop on Software and Compilers for Embedded Systems (SCOPES) (pp. 58-61). Sankt Goar, DE.
Streit, F.-J., Fritz, F., Becher, A., Wildermann, S., Werner, S., Schmidt-Korth, M.,... Teich, J. (2020). Secure Boot from Non-Volatile Memory for Programmable SoC-Architectures. In IEEE Proceedings of the 13th International Symposium on Hardware Oriented Security and Trust. San José, USA, US.
Özkan, M.A., Pérard-Gayot, A., Membarth, R., Slusallek, P., Leißa, R., Hack, S.,... Hannig, F. (2020). AnyHLS: High-Level Synthesis with Partial Evaluation. In Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS). Hamburg, DE.
Our research centers around the systematic design (CAD) of hardware/software systems, ranging from embedded systems to HPC platforms. One principal research direction is domain-specific computing that tries to tackle the very complex programming and design challenge of parallel heterogeneous computer architectures. Domain-specific computing drastically separates the concerns of algorithm development and target architecture implementation, including parallelization and low-level implementation details. The key idea is to take advantage of the knowledge being inherent in a particular problem area or field of application, i.e., a particular domain, in a well-directed manner and thus, to master the complexity of heterogeneous systems. Such domain knowledge can be captured by reasonable abstractions, augmentations, and notations, e.g., libraries, Domain-specific programming languages (DSLs), or combinations of both (e.g., embedded DSLs implemented via template metaprogramming). On this basis, patterns can be utilized to transform and optimize the input description in a goal-oriented way during compilation, and, finally, to generate code for a specific target architecture. Thus, DSLs provide high productivity plus typically also high performance. We develop DSLs and target platform languages to capture both domain and architecture knowledge, which is utilized during the different phases of compilation, parallelization, mapping, as well as code generation for a wide variety of architectures, e.g., multi-core processors, GPUs, MPSoCs, FPGAs. All these steps usually go along with optimizing and exploring the vast space of design options and trading off multiple objectives, such as performance, cost, energy, or reliability.
Research projects
ACoF -- Approximate Computing on FPGAs
(Third Party Funds Single)
Funding source: DFG-Einzelförderung / Sachbeihilfe (EIN-SBH)
Analysis, optimization, and automatic synthesis of sensor data processing applications on AMMOD base stations
(Third Party Funds Single)
Funding source: Bundesministerium für Bildung und Forschung (BMBF)
URL: https://www.zfmk.de/de/forschung/projekte/ammod-eine-wetterstation-fuer-artenvielfalt
This project is funded by the Federal Ministry of Education and Research (BMBF) as part of the AMMOD project. The implementation of the project is overseen by the German Aerospace Center (DLR).
Our planet loses biodiversity year after year. Since 1990, the number of insects and birds in Central Europe has fallen sharply, which has been confirmed by individual studies. However, there is no comprehensive collection and scientific evaluation of such data, as is the case, for example, in climate research. The main reason being that technical prerequisites and infrastructures are lacking.
The AMMOD project combines innovative technologies and adapts them to automatize the detection of species, in analogy to continuous measurements achieved with autonomous weather stations. For this purpose, the following modules are developed:
For the automated monitoring of the occurrence of different species in extensive, often inaccessible areas, these AMMOD technologies as well as the storage, processing and transmission of their data must be integrated on a generic platform, which serves as a "weather station of biodiversity". This platform must be equipped with various sensors and actuators and configurable with various software and hardware components. The challenge in designing this platform is that, on the one hand, such stations have to process, store, and transmit large amounts of data via mobile radio. On the other hand, the available resources in the field are limited (energy based on solar or wind power for a self-sufficient power supply, data storage capacity and communication bandwidth).
Our subproject deals with sensor data processing and storage within the base station. The subproject has two main objectives. On the one hand, designing a hardware architecture for the AMMOD base station which enables the processing and storage of sensor data energy-efficiently and in real time, but which can be generically adapted for the different application domains. On the other hand, the partners of other subprojects will be supported in the implementation of their algorithms in software and hardware, since the programming of the hardware architectures embedded in AMMOD stations (especially multi-core computers and programmable hardware components) requires expert knowledge. It is a declared goal to provide a design methodology that automatically generates an optimized hardware-software configuration of the platform from an intuitive and graphical description of data processing algorithms, so that experts from other areas are also able to program the platform without the corresponding know-how.
Cyberkriminalität und forensische Informatik
(Third Party Funds Single)
Funding source: Deutsche Forschungsgemeinschaft (DFG)
URL: https://www.cybercrime.fau.de-
Cyberkriminalität wird angesichts der wachsenden gesellschaftlichen Bedeutung der Informationstechnologie zu einer immer größeren Bedrohung. Gleichzeitig bieten sich neue Möglichkeiten der Strafverfolgung, wie etwa automatisierte Datensammlung und -auswertung im Netz oder Überwachungsprogramme. Doch wie geht man mit den Grundrechten der Betroffenen um, wenn „forensische Informatik“ genutzt wird? Das GRK „Cyberkriminalität und Forensische Informatik“ bringt Expertinnen und Experten der Informatik und Rechtswissenschaften zusammen, um das Forschungsfeld „Strafverfolgung von Cyberkriminalität“ systematisch zu erschließen.
Invasive Tightly-Coupled Processor Arrays (B02)
(Third Party Funds Group – Sub project)
Term: 1. July 2010 - 30. June 2022
Funding source: DFG / Sonderforschungsbereich / Transregio (SFB / TRR)
URL: http://invasic.informatik.uni-erlangen.de/en/tp_b2_PhIII.php
TCPAs provide a platform for the highly time-predictable and ultra-low power implementation of parallel loop nests. Yet, as loop bounds may often be unknown at compile-time, new techniques for (a) self-invasion are required to determine claim sizes and perform (b) self-power adjustment and (c) self-selection of redundancy schemes at run time to enforce throughput, latency, power and reliability requirements. Moreover, to lift TCPAs to new application areas, (d) novel floating point processors with invadable precision (FloaTCPAs) including (e) functional units with programmable latency to compute instructions approximately will be investigated.
Central Services of the Transregional Collaborative Research Centre and Public Relations (Z01)
(Third Party Funds Group – Sub project)
Term: 1. July 2010 - 30. June 2022
Funding source: DFG / Sonderforschungsbereich / Transregio (SFB / TRR)
URL: http://invasic.informatik.uni-erlangen.de/en/tp_z.php
Basics of Invasive Computing (A01)
(Third Party Funds Group – Sub project)
Term: 1. July 2010 - 30. June 2022
Funding source: DFG / Sonderforschungsbereich / Transregio (SFB / TRR)
URL: http://invasic.informatik.uni-erlangen.de/en/tp_a1_PhIII.php
Albeit the isolation of parallel programs on multicore systems through invasive computing, uncertainties of input, machine state and environment currently prohibit to provide predictable and tight bounds on non-functional properties such as timing and power and to guarantee that requirements on these will never be violated. We will investigate novel concepts and techniques for run-time requirement enforcement (RRE) including (a) centralised vs. distributed, (b) loose vs. strict, (c) proper formal verification techniques for strict enforcers and general pro-gram properties, finally (d) techniques for automatic enforcer generation from requirements.
DFG SFB/Transregio 89 "Invasive Computing"
(Third Party Funds Group – Overall project)
Funding source: DFG / Sonderforschungsbereich / Transregio (SFB / TRR)
URL: http://www.invasic.de
Mission I: Basic Principles and Invasive Efficiency. As major results of the first funding phase, substantial gains in multicore utilisation and efficiency have been shown to be achievable by only claiming resources when necessary and retreating from them if not needed.
Mission II: *-Predictability. A unique jewel of invasive computing is the inherent capability to isolate even distributed applications from each other by not sharing resources. This feature has shown to enable *-predictability of non-functional qualities of program execution such as execution time, throughput, but also safety and security properties. Using current multicore platforms and operating systems, little if no support for hardware and/or temporal isolation can be established on demand of an application program. By exploiting the fact that resources may be (temporally) claimed exclusively, we were able to show that *-predictability may be enabled on program demand using invasive computing which uses run-to-completion as the default mode of thread execution, partial virtualisation and techniques for memory reconfiguration and bandwidth guarantees on the designed invasible NoC.
Mission III: Beating Run-Time Uncertainties and Run-Time Requirement Enforcement. Not only the interferences caused when sharing resources such as caches, processors and communication links as being the practice today, makes the analysis of non-functional properties hard. The bounds themselves or their variability might be much too large for any practical use. Unfortunately, isolation alone does not help to reduce the remaining uncertainty caused by input (problem size), environment (e.g. temperature), and machine state (e.g., cache, power manager, etc.). Our goal of phase III is therefore to close this missing link for making multicore systems available to be used for the billion dollar market of embedded and cyber-physical IoT products where application programs require the strict or at least loose enforcement of tight non-functional property ranges. Here, through the static analysis of robustness and the automatic generation of verifiable run-time requirement enforcer (RRE) modules (additional code that either locally or globally observes and controls the satisfaction of requirements within prescribed corridors) in combination with run-time requirement monitoring (RRM), we expect to provide the missing link to successfully combine resource awareness and tight predictability of non-functional aspects of program execution on multicore platforms.
2022
2021
2020
Related Research Fields
Contact: